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![Suomeksi](/gif/hy/flag-fi-25x21.gif)
![In English](/gif/hy/flag-uk-25x21.gif)
DEADLINE: Friday, November 3.
GOALS
- To understand the principles and functionality of virtual memory mechanism and its implementation.
Key words: logical address, physical address, MMU and address translation, paging and page tables, segmentation and segment tables, translation lookaside buffer (TLB)
MATERIAL
- Course Book: Stallings. Operating Systems, Chapters 7-8
- Slides (only in Finnish)
- See also Stallings's pages
Other materials: A.S. Tanenbaum: Modern Operating Systems. 2nd ed. 2001. Section 4, pages 189-262. Also in Kumpula Library, 2nd floor.
The submitted report can be hand written (but clear enough). It does not have to be essay, but it needs to form a continuous 'story'. Do not forget to explain the details: who is doing (OS / HW), why and when, etc ...The report must contain:
- Cover page, with participant names, number and teacher of the
small group session
- The actual 'essay
or report' of the section problem
- Self-evaluation part
You will need to make several assumptions about the system state and the used mechanisms. Please state clearly in your report the assumptions you made. The simulation of the process execution starts when the operating system is just switched a newly arrived process to execution for the first time. During its execution the process accesses virtual addresses (not page numbers, but memory addresses) 0, 1 .. 200, 3001, 3002, 180 .. 190, 5000, 5001, 150..170, 6300, 6302, 10, 11 in this sequence. In the 'simulation' assume that initially the operating system has already loaded all virtual pages except the page, where the addresses 5000 and 6300 are, from the disk to the memory. Additionally, the page, where the address 6300 is, does not immediately fit to memory. You will need to clear at least one page frame for it. Describe the mechanism you are using and the causes for the decisions. (Make all necessary assumptions). You may assume that the virtual memory mechanism is using just one page table for one process and that Translation Lookaside Buffer (TLR) in the Memory Management Unit (MMU) contains 16 places. The size of one page is 1024 Bytes. For the memory address translations you will need to 'guess' the actual page frame numbers. Please do not assume that the page number and the corresponding page frame number are identical. If you wish, you can pick some of the page frame numbers from the book's problem 8.1. Please notice that all the information in the problem may not be relevant to this simulation. Please discuss also other issues considering a virtual memory mechanism. These issues should cover also the disadvantages of using virtual memory. You can use the following list as ideas to your discussion:
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Each team: Please evaluate your teams work as well as your own work using the following questions:
The evaluation has two goals: (1) to collect information about the exercises and study groups, and (2) to help study groups to make their work even better. We appriciate short answers that give the essentials in a compact form. Please try to be open minded. Answer to each question and give also your reasonings. |
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