Re: [PATCH] (0/7) Finish moving NUMA-Q into subarch, cleanup

[William Lee Irwin III]

On Wed, Jan 15, 2003 at 01:30:37PM -0600, Protasevich, Natalie wrote:
> ... and one more from me: isn't it time to let IO-APIC id be 8 bit in the
> asm/io_apic.h (make it a union fot both?..)?
> Look what I have to do in io_apic.h to get around it and ... "mister, have a
> heart":

Point taken; it doesn't burn NUMA-Q, but this probably hits Summit (with
its much more recent APIC and IO-APIC revisions). I don't see why not.
The hardware is there, time to drop in the code to handle it.

At some point in the past, I wrote:
>> There are also somewhat deeper issues with vector assignments to
>> interrupt sources that prevent elevating any of the above to useful
>> levels and utilizing them. The assumptions based on the vector assignment
>> algorithm appear to be widely distributed enough to discourage me after
>> an initial attempt or two to get any kind of useful interrupt routing
>> for a number of IRQ sources larger than the number of vectors.

On Wed, Jan 15, 2003 at 01:30:37PM -0600, Protasevich, Natalie wrote:
> I strongly suggest to take a look in IA64 implementation. 
> They have 1:1 correspondence between IRQ and vector and don't seem to be
> able to run out of vectors or IRQs.

Given that almost nothing actually cares what the irq numbers are, it
sounds like a really good idea to encode the node ID in the upper bits
and the vector in the lower bits (SN2 uses cpuid). I'll try it out.

Thanks!
Bill