Re: Intel P6 vs P7 system call performance

Christian Leber (christian@leber.de)
Sat, 21 Dec 2002 17:07:06 +0100


On Wed, Dec 18, 2002 at 12:25:38AM -0500, Brian Gerst wrote:

> How about this patch? Instead of making a per-cpu trampoline, write to
> the msr during each context switch. This means that the stack pointer
> is valid at all times, and also saves memory and a cache line bounce. I
> also included some misc cleanups.

Just a little bit of benchmarking:
(little testprogram by Linus out of this thread)
(on a AMD Duron 750)

2.5.52-bk2+sysenter-1 (Brian Gerst):
igor3:~# ./a.out
187.894946 cycles (call 0xfffff000)
299.155075 cycles (int $0x80)

2.5.52-bk6:
igor3:~# ./a.out
202.134535 cycles (call 0xffffe000)
299.117583 cycles (int $0x80)

Not really much, but the difference is there. (I don't about other side
effects)

Christian Leber

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