Re: [patch] smptimers, old BH removal, tq-cleanup, 2.5.39
Dipankar Sarma (dipankar@in.ibm.com)
Thu, 3 Oct 2002 12:40:17 +0530
On Tue, Oct 01, 2002 at 05:51:45AM +0200, Ingo Molnar wrote:
>
> the smp_processor_id()/(HZ*num_cpus) 'interleaving' of every APIC clock
> was an SMP scalability issue, and it was done as part of the smptimers
> patch. It just got into the kernel much earlier.
>
> but these days, with the removal of BHs, it might be less of a factor,
> mainly because timers have no global synchronization anymore, so we can
> again try to not interleave the APIC clocks. Only testing will tell,
> because there might be some interaction between timer-generated code
> still.
>
> Dipankar, wli, would it be possible to try the attached simple patch with
> some of the more complex networking loads? The patch gets rid of the APIC
> timer interleaving.
>
Ingo,
Removal of interleaving of apic timers doesn't seem to have any adverse affect.
Here are some numbers from a 16-CPU NUMA-Q with tbench (32 clients) averaged
over 5 runs -
2.5.40-vanilla - 44.16 MB/Sec
2.5.40-no-clock-interleave - 44.17 MB/Sec
Thanks
--
Dipankar Sarma <dipankar@in.ibm.com> http://lse.sourceforge.net
Linux Technology Center, IBM Software Lab, Bangalore, India.
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