581372-6 Performance Evaluation, Final Exam 29.1.1999 (suomeksi kääntöpuolella)

1. In a time share system (Z=20 sek) there is one CPU (S_cpu = 20 msek), and two disks (S_disk1 =60 msek and S_disk2=40 msek). The time share jobs use first the CPU, and then either complete (with probability 5%) or use disk1 (prob. 50%) or disk2 (prob 45%). After using a disk each job will return to the CPU, and repeats this cycle until it completes.
   1. What are the visit ratios?
   2. What is the bottleneck device? Why?
   3. What is the maximum possible system throughput?
   4. What is the best possible upper limit for system throughput with one terminal in the system?
   5. What is the best possible upper limit for system throughput with 10 terminals in the system?
   State your assumptions and explain your work.

2. MVA vs. approksimate MVA.
   
   1. What is common with these?
   2. How do they differ?
   3. When would it be better to use MVA than approximate MVA? Why?
   4. When would it be better to use approximate MVA than MVA? Why?
   5. When neither one of these would be suitable solution method?

3. Your company is making automatic teller machines (ATMs, money mover machines) and software for them. The software controls ATM operations locally as well as communication with the central bank computer. In the next generation ATMs one can also use smart cards in addition to the current magnetic stripe based cards. Smart card processing requires significantly more computational power than magnetic stripe card processing because of security reasons. It would be economical, if it would be enough to add a new smart card reader to the ATMs and update the software, but keep the current computing system intact.

   Your job is to make sure that the capacity of the computing system is sufficient also when the smart cards are introduced. Give a rough (max 3 pages) performance evaluation plan for this project. Explain also what type hardware and personnel resources are needed for the project, and what would be the estimated time span for the project.

4. A simple network controller card handles arriving messages one at a time. On the network side, the messages arrive with interarrival time in average 50 ms, and they are received in a message buffer (B1). The interphase processor (IP) is signaled once the message buffer is full. The IP (or the IP process running on the IP) copies the message (from B1) into the controller card Input buffer that is part of the general processing unit (GPU) address space. The IP then signals the network driver running on the GPU. This takes altogether 10 ms, in average. If message buffer B1 is full, then new arriving messages will be discarded, and (hopefully) eventually resent by a higher level message protocol.
   1. What is the average IP utilization?
   2. What is the average buffer (B1) utilization?
   3. How long does it take for an arriving message to be stored into the Input buffer?
   4. What is the Input buffer message arrival rate (not including those messages that are discarded)?
   5. What proportion of messages are discarded?
   6. What are your conclusions on the network card performance?
   State your assumptions and explain your work.