581372-6 Perf. Eval., Term Exam 29.10.1998 (suomeksi kääntöpuolella)

1. [13 p] We have terminal system (Z=20 sec) with two CPU's (one queue, S_cpu = 50 msec), and two disks (S_disk1 =60 msec and S_disk2=40 msec). Each task given from the terminals requires first CPU service, and then either completes (probability 5%), goes to disk1 (prob. 55%), or goes to disk2 (prob. 40%). After disk service the task returns to the CPU and repeats this cycle until it completes.
   1. What are the visit ratios?
   2. What is the bottleneck device? Why?
   3. What is the maximum possible system throughput?
   4. What is your best upper limit for system throughput time with 10 terminals?
   5. What is your best upper limit for system throughput time with 40 terminals?
   State your assumptions and explain your work.

2. [12 p] Your company has sold to a new on-line reservation system to the SunnyBeach travel agency. However, the travel agents are now complaining that the new system is sluggish and sometimes even slower than the old system they had originally. Your boss is really worried because she has (had?) grand plans for more sales. She wants you to find out what is wrong. As the first phase, she wants you to provide a short (no more than 3 pages) performance evaluation plan on how you will attack this problem. Please provide that plan here.

3. [12 p] Consider a mainframe that processes three classes of workload: batch (B), interactive (I) and transactions (T). Classes B and I run directly on top of the operating system whereas user transactions execute within the TP monitor. There are two distinct transaction (sub-)classes: queries (Q) and updates (U). The performance analyst has made a model of the system, and now he needs to calculate the values for the CPU demand parameters. Measurements collected by a system monitor for 30 minutes indicate a total CPU utilization of 72%. The operating system accounting facility recorded CPU utilization on a per-class basis, giving U_cpu,B=32%, U_cpu,I=10%, and U_cpu,T=28%. A program analyzer of the TP monitor provided the following statistics for the measurement period: 1200 query transactions taking 120 seconds of CPU time and 400 update transactions taking 140 seconds of CPU time.
   1. What are the CPU demands for classes B and I?
   2. What are the CPU demands of transaction classes Q and U?
   State your assumptions and explain your work.

4. [13 p] A simple network controller card handles arriving messages one at a time. On the network side, the messages arrive with interarrival time in average 30 ms, and they are received in one of the two message buffers (B1 or B2). The interphase processor (IP) is signaled once a message buffer is full. The IP (or the IP process running on the IP) copies the message (from B1 or B2) into the controller card Input buffer that is part of the general processing unit (GPU) address space. The IP then signals the network driver running on the GPU. This takes altogether in average 10 ms. If both arriving message buffers B1 and B2 are full, then new arriving messages will be discarded, and (hopefully) eventually resent by a higher level message protocol.
   1. What is the average IP utilization?
   2. What is the average buffer (B1 or B2) utilization?
   3. How long does it take for an arriving message to be stored into the Input buffer?
   4. What is the Input buffer message arrival rate (not including those messages that are discarded)?
   5. What proportion of messages are discarded?
   6. What are your conclusions on the network card performance?
   State your assumptions and explain your work.