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Alan Cox wrote:
> On Gwe, 2003-07-11 at 22:04, xi wrote:
>
>>And one interesting thing:
>>in the AMD762 datasheet (24462.pdf) page 231 (Recommanded BIOS
>>settings), I can see this: "Numerical Values shown with h or b are
>>preferred settings." ; and AMD recommand this:
>>-> set bits 2 and 1 of register 0x4C to "0b"
>>-> set bits 23 and 3 respectively to "0b" and "1b"
>>
>>I can confirm that these settings works much more better, even if they
>>don't exactly follow PCI specs. And I don't think this is specific to my
>> cards since I have tested others.
>>Furthermore, my AMD762 is revision B1 (just before the last one: C0),
>>and my AMD768 revision is B2, the last one.
>>
>>Would you accept I make a patch which doesn't make any change in these
>>registers at least up to AMD762 revision B1 (ie keeping recommanded
>>values from AMD) ?
>
>
> Lets try the AMD recommended settings. My old doc doesnt seem to have
> those. I'll by happy to trial the patch in -ac and see if it plays up
> the usual suspects for PCI spec violations (tg3 and i2o)
>
Ok, I provide two patchs with different behaviour:
* patch_AMD762_PCI_compliance_set_by_bios.diff : lets the BIOS decide
about PCI configuration
* patch_AMD762_PCI_default_AMD_settings.diff : follow AMD
recommendations but not PCI specs.
Patch are against drivers/pci/quirks.c from 2.4.22-pre4
Regards,
Xavier
-- E-mail: ctrl.alt.sup@free.fr xizard@chez.com Please no longer use xizard@enib.fr, this e-mail will be removed soon.Homepage: http://xizard.free.fr http://www.chez.com/xizard/
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--- quirks_original.c 2003-07-12 01:58:17.000000000 +0000 +++ quirks.c 2003-07-12 04:40:57.000000000 +0000 @@ -464,22 +464,23 @@ * Following the PCI ordering rules is optional on the AMD762. I'm not * sure what the designers were smoking but let's not inhale... * - * To be fair to AMD, it follows the spec by default, its BIOS people - * who turn it off! + * In fact, AMD even recommends to don't follow PCI standards + * in the section "Recommended BIOS settings" of the datasheet */ static void __init quirk_amd_ordering(struct pci_dev *dev) { - u32 pcic; - pci_read_config_dword(dev, 0x4C, &pcic); - if((pcic&6)!=6) + u32 pcic1,pcic2; + + pci_read_config_dword(dev, 0x4C, &pcic1); + pci_read_config_dword(dev, 0x84, &pcic2); + + if((pcic1&6)!=6 || (pcic2&(1<<23))!=(1<<23)) { - pcic |= 6; - printk(KERN_WARNING "BIOS failed to enable PCI standards compliance, fixing this error.\n"); - pci_write_config_dword(dev, 0x4C, pcic); - pci_read_config_dword(dev, 0x84, &pcic); - pcic |= (1<<23); /* Required in this mode */ - pci_write_config_dword(dev, 0x84, pcic); + /* The AMD762 doesn't follow PCI standards, but it seems to work better in this mode ! + In order to be fully PCI standards compliant, we should : + set bit 1 and 2 of register 0x4C ; set bit 23 and clear bit 3 of register 0x84 */ + printk(KERN_WARNING "BIOS didn't enabled PCI standards compliance.\n"); } }
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--- quirks_original.c 2003-07-12 01:58:17.000000000 +0000 +++ quirks.c 2003-07-12 04:44:02.000000000 +0000 @@ -464,23 +464,24 @@ * Following the PCI ordering rules is optional on the AMD762. I'm not * sure what the designers were smoking but let's not inhale... * - * To be fair to AMD, it follows the spec by default, its BIOS people - * who turn it off! + * In fact, AMD even recommends to don't follow PCI standards + * in the section "Recommended BIOS settings" of the datasheet */ static void __init quirk_amd_ordering(struct pci_dev *dev) { u32 pcic; + + printk(KERN_WARNING "Setting AMD recommended values for PCI bus. It isn't fully PCI standards compliant\n"); + pci_read_config_dword(dev, 0x4C, &pcic); - if((pcic&6)!=6) - { - pcic |= 6; - printk(KERN_WARNING "BIOS failed to enable PCI standards compliance, fixing this error.\n"); + pcic &= ~((u32)6); pci_write_config_dword(dev, 0x4C, pcic); + pci_read_config_dword(dev, 0x84, &pcic); - pcic |= (1<<23); /* Required in this mode */ + pcic &= ~((u32)(1<<23)); + pcic |= (1<<3); pci_write_config_dword(dev, 0x84, pcic); - } } #ifdef CONFIG_X86_IO_APIC
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