Re: [patch] cache flush bug in mm/filemap.c (all kernels >= 2.5.30(at least))

Russell King (rmk@arm.linux.org.uk)
Mon, 26 May 2003 09:55:51 +0100

On Sun, May 25, 2003 at 08:19:32PM -0700, David S. Miller wrote:
> Oh yes, this part is. If you don't ensure this, everything
> breaks.
>
> At the end of an I/O operation, say to a page cache page, that
> data ought to be visible equally to a userspace vs. a kernel
> space mapping to that page.
>
> For example, this is why we use language about "cpu visibility" in the
> DMA api documentation and not "kernel cpu visibility" :-) And because
> PIO transfers are basically pseudo-DMA they need to make the same exact
> guarentees.
>
> If you've been living in a world where you didn't think this is
> necessary, I certainly feel bad for you :-)

Ok, so the flush_dcache_page() interface looses this; the original
placement of the flush_page_to_ram() ensured that data written by
device drivers was visible to user space.

Maybe the BIO layer can handle this - the same problem exists when
(and if) BIO uses a bounce buffer, so it would have to be handled
there. Jens?

Lothar - can you confirm that your problem vanishes when you turn off
write allocation on the caches please? (cachepolicy=writeback)

-- 
Russell King (rmk@arm.linux.org.uk)                The developer of ARM Linux
             http://www.arm.linux.org.uk/personal/aboutme.html


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