> For nmi_watchdog=1 the NMI watchdog uses the programmable interval timer
> to trigger interrupt events via the IOAPIC. with nmi_watchdog=2 we use the
> performance counters on the processor to trigger these events. IOAPICs
> are generally found on SMP motherboards (but there are UP boards with
> them, it's chipset dependent). Generally i686+ (save some Athlons and a
> few other processors) will work with nmi_watchdog=2.
Forgot this bit;
w/ CONFIG_X86_LOCAL_APIC=y you only have nmi_watchdog=2
w/ CONFIG_X86_IO_APIC=y you have nmi_watchdog=1 and 2
w/ CONFIG_SMP you have nmi_watchdog=1 and 2 as it depends on
CONFIG_X86_IO_APIC
Zwane
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