Yes, but ideally this kludge would go away...
> In that case, the PCI
> subsystem would only need to provide an interface to provide
> the architecture/platform specific inbound MSI location.  The PCI
> subsystem would then find all MSI capable PCI devices, and assign
> the appropriate number of unique messages and inbound MSI address
> to each device via the speced PCI MSI interface.  The PCI subsystem
> would also be responsible for maintaining a correspondence between
> virtual Linux interrupt values and MSI values.
> 
> Software specific to the PCI MSI capable "Northbridge", will then
> route general MSI interrupt events to some PCI subsystem helper
> functions to verify which MSI has occurred and thus which Linux
> virtual interrupt. 
That sounds like a lot of overhead.  In particular it means we keep
converting to and from `virtual IRQs'.  I would hope the MSI work would
allow us to tie in at a lower level than virtual interrupts.  I was
thinking an interface would look something like:
void *request_msi(struct device *dev,
		irqreturn_t (*handler)(int, void *, struct pt_regs *),
		unsigned long irqflags,
                void *dev_id)
You need a struct device to figure out which interrupt controller it
needs.
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