I got my info from an article on the net which says that a 386 does
behave as you say, but it is possible for the system designer to
arrange that it boots into the 286-compatible vector at physical
address 0x000ffff0. It states that the feature is specifically so
that system designers don't have to create a "memory hole" (that's as
much detail as it gives).
I can't be arsed to look in a real 386 manual though :)
> Source: 80386 Programmers Reference Manual, Intel (1986)
>
> EIP is set 0000FFF0H
> CS is set F000H
>
> After RESET, lines A31-A20 are FORCED high till a far JMP is done.
>
> So, unfortunately we have to say Linus is right once again. Damn ;-) My
> conclusion is that we are unable to use the CPU reset as the reference for
> warm boots, for we can't control A312-A20 in real mode. But as far as I can
> see, my arguments still hold...
You can set up unreal mode but it is quite fiddly.
-- Jamie
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