> The devil is in the details: you have to edit the TSS, clear the busy bit
> of the previous TSS, LTR, clear the busy bit of the debug TSS, restore
> many registers from the previous TSS image, switch to the kernel stack of
> the interrupted process, push a lot of stuff on the stack to be used by iret.
> (depending on whether you return to kernel/user/v86 modes). All of this in the
> right order, of course (and after having cleared your own NT flag).
And this is the way to do it right, but...
> Doable I believe but not simple, and there is still the TS issue.
I finally realized the TS problem is basically unsolvable. There is no
way to know what the value was before a switch happened.
(BTW some other Free kernel has interesting things in its descriptor
tables: DPL 1 execute-only code segments, conforming code, expand-down
data, multiple LDTs etc... It uncovered a bug in my code, too.)
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