On Thu, Apr 24, 2003 at 05:06:58AM -0400, Chuck Ebbert wrote:
> I forgot to mention: try comparing 2.2, 2.4 and 2.5.
> Also, this is what I've been using to look at interrupt entry
> point alignment. On 2.4 for sure, and probably on 2.5 you have
> a 1-in-8 chance of getting a pathologically badly aligned timer
> handler on 32-byte cacheline machines every time you compile
> (IRQ 0 entry address & 0x1f == 0x1c.) OTOH the pagefault handler
> has come up 8-byte aligned every time but I didn't look at the
> source to see if it's coded that way.
I had more in mind using it to verify the correctness of per-node IDT
stuff than checking optimality in general, but it does look very handy.
-- wli
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