No, MMIO is controlled by PCI_COMMAND_MEMORY bit. We'll just turn
off DMA.
> I still have no idea which bridge implementations (vendor/model)
> have this problem and thus no idea what the i386 code would need
> to look like. I was hoping Ivan (or someone) might know.
Perhaps it will be i386-specific "PCI_FIXUP_EARLY" routine which
turns of PCI_COMMAND_MASTER for all devices with a class code of
PCI_CLASS_SERIAL_USB.
Ivan.
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