Alan Cox wrote:
>It got CRC errors, not suprisingly and will drop back. Nevertheless it
>shouldnt have gotten this wrong, so more info would be good.
>
>
I'm wondering some things about IDE 40/80 pin cables since some time ago :
- somehow the circuitry can make the difference between 40 and 80 pin
(probably some pins are shorted or not by the cables or some
cable-type-dependent impedance between wires is mesured) and set a bit
for us to use.
- most probably the same circuitry can't verify the length of the cables
or their overall quality but I'm unsure.
#1 How is the 40/80 pin detection done at the hardware level ?
#2 Are there any other cable-quality hardware tests done by the chipsets
? How ?
I've encountered a barebone design (Mocha P4, uses 2.5" drives) where
the IDE cable was 40-pin but :
- has a single drive connector instead of the common two,
- its length is only around 10 or 15 cm.
A buyer contacted me for SiS IDE driver directions on this platform and
confirmed this at least for his purchase.
#3 Is the above cable electrically able to sustain 66+ UDMA transfers
(could I hack a driver in order to bypass the 80pin cable detection and
make it work properly) ?
#4 Are the electrical specs for 66+ UDMA transfers public (couldn't find
by googling) ? Where can we find them ?
Here I mean some really basic specs (max Resistance/Capacity/Inductance
between wires, max signal propagation delays and so on) and not general
high level specs (material, connector design, length ranges allowed in
the general 80-pin, 2 drives case).
Any hints on these Andre ?
LB.
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