Well, in fact, Intel's 82C54 datasheet says that this chip needs at least
165 ns between two consecutive operations, either read or write. So with a
8 Mhz bus, you may effectively need to insert fake accesses, although most
modern chipsets certainly have better specs.
But the spec clearly states that you can interleave accesses to other
counters between the first and second bytes without problem, so good
implementations should see no side effect.
Richard, if your PIT doesn't support accesses to port 80, could you try to
use other ports ?
Cheers,
Willy
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