> On Mon, Sep 30, 2002 at 07:43:16PM +0200, Alexander Hoogerhuis wrote:
>
> > PU: Before vendor init, caps: 3febf9ff 00000000 00000000, vendor = 0
> > Cache info byte: 50
>
> Instruction TLB (ignored)
>
> > Cache info byte: 5B
>
> Data TLB (ignored)
>
> > Cache info byte: 66
>
> 8K L1 data cache
>
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
> > Cache info byte: 00
>
> Null
>
> > Cache info byte: 40
>
> No 3rd level cache.
>
> > Cache info byte: 70
>
> 12K-uops trace cache
>
> > Cache info byte: 7B
>
> 512K L2 cache
>
> > Cache info byte: 00
>
> Null.
>
> > CPU: L1 I cache: 0K, L1 D cache: 8K
> > CPU: L2 cache: 512K
>
Here we go:
CPU: Trace cache: 12K uops, L1 D cache: 8K
CPU: L2 cache: 512K
But my BIOS still say I should have 8Kb/8Kb I/D L1 cache... oh
well. I'm sure Alan Cox would just write it up as marketing, since
thats about how reliable a BIOS is :)
ttfn,
A
-- Alexander Hoogerhuis | alexh@ihatent.com CCNP - CCDP - MCNE - CCSE | +47 908 21 485 "You have zero privacy anyway. Get over it." --Scott McNealy - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/