> - In ide-iops, the insw, insl, outsw, outsl functions are
> broken for big endian. They should not do byteswap on these,
> however, implemeting them with a loop of IN/OUT_BYTE/WORD
> will cause byteswapped access on archs like PPC.
> The problem is that the macros IN/OUT_BYTE/WORD don't define
> non-swapping equivalents that would allow us to correctly
> implement the "s" versions.
we have one special problem on m68k, on some machines the IDE
bus is byteswapped (unrelated to cpu endianness). For historical
and performance reasons data to the HD is by default read and
written in this "wrong" order (thus the bswap/swapdata option)
and special fixup code is used in ide_fix_driveid (see
M68K_IDE_SWAPW). However data returned by IDE_DRIVE_CMD is not
treated in any way, so that eg WIN_SMART data end up in the
wrong order on those machines and this is something I would
like to fix properly.
I figure I would define ata_*_{control,data} to handle special
data resp raw HD data and modify ide_handler_parser to return
specialised interrupt handlers or set some additional flag.
Any thoughts?
Richard
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