This issue has already been resolved as a chipset issue requiring
I/O mapped register access to work around. The "old" aic7xxx driver
avoids these issues by issuing a register read after every register
write. This stops up your PCI bus with wasted cycles even if you have
a perfectly working chipset.
So, how would you like me to resolve this. We can do the same thing
as Adaptec's windows drivers and just always use the slower, less
efficient I/O mapped method for accessing registers. This will "fix"
the problems people have with broken VIA and Intel chipsets. I can
make this a compile and run-time option, but should we default to
I/O mapped or memory mapped?
Don't you just love broken PC hardware?
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