Thanks for the pointer Andi, I should have thought of oprofile before.
You wouldn't happen to know the equivalent counter event to a
tlb_flush_mmu() for a PIII by any chance, would you? :). I've checked
op_help and only found the ITLB_MISS. I look at the L2_* related cpu
counters but can't find a TLB flush counter.
I'm reading through Appendix A of the IA-32 Architecture Vol 3 manual
(it's actually very interesting), but I haven't found it either so far.
Do I have to check for the INVLPG instructions?
Best regards,
Roberto Nibali, ratz
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