The ETRAX chips where the cris architecture is used is typically used in
headless embedded devices connected to a network. Currently I don't think
we use SA_RANDOM anywhere in our device drivers although it would be
nice to be able to use network and other interfaces as entropy/randomness
source (serial, parallel etc.) without to much concerns.
> > The num is xor:d with the value from 2 timer registers,
> > which in turn contains different fields breifly described below.
> >
> > Does the patch below look sane?
>
> Looks fine, but I think we want to come up with a cleaner scheme of
> having per-arch high-res timestamps. I'd hate to have that grow to
> several pages of ifdefs and not have it available anywhere else.
Yes, I've seen the discussion before.
Any idea of how such a solution should look like?
Put an inline function or macro in asm/timex.h (?) together with an
ARCH_HAS_RANDOM_TIMESTAMP define?
E.g. like this for i386:
#define ARCH_HAS_RANDOM_TIMESTAMP
#define RANDOM_TIMESTAMP(time, num) do{\
if ( test_bit(X86_FEATURE_TSC, &boot_cpu_data.x86_capability) ) { \
__u32 high; \
rdtsc(time, high); \
num ^= high; \
} else { \
time = jiffies; \
} \
}while(0)
And then in random.c:
ifdef ARCH_HAS_RANDOM_TIMESTAMP
RANDOM_TIMESTAMP(time, num);
#else
time = jiffies;
#endif
/Johan
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