Re: amd k6-3 L3 cache

[Rene Rebe]

Hi.

On: Tue, 4 Jun 2002 23:46:16 -0500,
    Peter Rabbitson <[e-mail]> wrote:
> Hi everyone. I have a question regarding hardware caches. When I compile the
> kernel on k6/2 cpu I get messages identifying L1 cache of 64k and L2 cache of
> 1024k which are the actual hardware amounts. But kernel on a k6/3+ cpu gives
> out this:
> -------
> CPU: L1 I Cache: 32K (32 bytes/line), D cache 32K (32 bytes/line)
> CPU: L2 Cache: 256K (32 bytes/line)
> CPU: After vendor init, caps: 008021bf c08029bf 00000000 00000002
> CPU:     After generic, caps: 008021bf c08029bf 00000000 00000002
> CPU:             Common caps: 008021bf c08029bf 00000000 00000002
> ------

This are the correct values - I do not know why a K6/2 kernel reports
bogus ones.

The caches (incl. the L3 cache on the mainboard) are used by the
silicon logic in you CPU and chipset automatically - no OS or BIOS
support is needed for this.

> Does this mean that I am actually loosing the benefit of having 1m of cache 
> on the motherboard (in this case L3)? Or the kernel still uses transparrent
> bios routines and stores data in L3? Or maybe such cpus shopuld run kernel
> compiled for k7/athlon cpus? I would appreciate any comments or suggestions,
> nevertheless I am more than non-proficient in programming. Just a curious
> cat in the linux community :)
> 
> Peter

k33p h4ck1n6
  René

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René Rebe (Registered Linux user: #248718 <http://counter.li.org>)
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