Re: amd k6-3 L3 cache

Dave Jones (davej@suse.de)
Wed, 5 Jun 2002 12:11:45 +0200

On Tue, Jun 04, 2002 at 11:46:16PM -0500, Peter Rabbitson wrote:
> Hi everyone. I have a question regarding hardware caches. When I compile the
> kernel on k6/2 cpu I get messages identifying L1 cache of 64k and L2 cache of
> 1024k which are the actual hardware amounts. But kernel on a k6/3+ cpu gives

L1/L2 cache is on CPU. L3 is on motherboard. The kernel only reports
(and cares about) L1/L2 (And then asides from informational purposes,
i.e. /proc/cpuinfo, it's only used for anything useful under SMP which isn't
an issue for K6-3)

The L3 is being used transparently, with no need for any support by
the kernel. (As long as it's been enabled by the BIOS)

Dave

-- 
| Dave Jones.        http://www.codemonkey.org.uk
| SuSE Labs
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