Re: Q: PREFETCH_STRIDE/16

David Mosberger (davidm@napali.hpl.hp.com)
Thu, 23 May 2002 09:26:54 -0700


>>>>> On Thu, 23 May 2002 16:12:16 +0100 (BST), Hugh Dickins <hugh@veritas.com> said:

Hugh> Could anyone please shed light on PREFETCH_STRIDE, and in
Hugh> particular its sole use:
Hugh> prefetchw(pmd+j+(PREFETCH_STRIDE/16)); in mm/memory.c:
Hugh> free_one_pgd().

Hugh> That looks to me suspiciously like something inserted to suit
Hugh> one particular architecture - ia64? is it really suitable for
Hugh> others? is 4*L1_CACHE_SIZE really right for PREFETCH_STRIDE on
Hugh> anything that prefetches except ia64? what's the "/ 16"?
Hugh> shouldn't there be a "/ sizeof(pmd_t)" somewhere (PAE or not)?
Hugh> is it right to prefetch each time around that loop? isn't it
Hugh> appropriate only to the exit_mm (0 to TASK_SIZE) clearance?

Hugh> All in all, I'm thinking that line shouldn't be there, or not
Hugh> without a substantial comment...

That code certainly wasn't optimized for ia64. Furthermore, I also do
not like the prefetch distance it's using. In fact, in my ia64-patch,
I use the following code instead:

prefetchw(pmd + j + PREFETCH_STRIDE/sizeof(*pmd));

This is more sensible (because it really does prefetch by the
PREFETCH_STRIDE distance) and it also happens to run (slightly) faster
on Itanium.

--david
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