That looks to me suspiciously like something inserted to suit
one particular architecture - ia64? is it really suitable for
others? is 4*L1_CACHE_SIZE really right for PREFETCH_STRIDE
on anything that prefetches except ia64? what's the "/ 16"?
shouldn't there be a "/ sizeof(pmd_t)" somewhere (PAE or not)?
is it right to prefetch each time around that loop? isn't it
appropriate only to the exit_mm (0 to TASK_SIZE) clearance?
All in all, I'm thinking that line shouldn't be there,
or not without a substantial comment...
Thanks,
Hugh
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