See what I mean? You can share all the generic stuff, and only differ in
the details.
I think it is easier to make tlb_{start,end}_vma do the cache/tlb
flushing, and then change tlb_flush_mmu() to look something like:
static inline void tlb_flush_mmu(mmu_gather_t *tlb, unsigned long start, unsigned long end)
{
unsigned long nr;
- flush_tlb_mm(tlb->mm);
+ tlb_flush_mm(tlb->mm);
nr = tlb->nr;
if (nr != ~0UL) {
unsigned long i;
tlb->nr = 0;
for (i=0; i < nr; i++)
free_page_and_swap_cache(tlb->pages[i]);
}
}
Architectures define tlb_flush_mm() as appropriate, on x86 it would
be just flush_tlb_mm(mm), on Sparc/PPC/etc. which uses the VMA
flushing it would just be a NOP.
This allows to share all of the infrastructure, with just a few
overrides for the arch specific bits.
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