As the person who added AMD K7 local APIC support to the kernel, I
consider the _real_ problem to be the lack of adequate documentation.
AMD has almost no documentation on the K7's machine-specific features,
and VIA similarly don't seem keen on documenting their chipsets.
If someone were to find AMD K7 documentation at the level of Intel's
IA32 Volume 3 manual (245272-006), and AMD K7 errata docs at the level
of Intel's PIII (244453-nn) and P4 (249199-nn) specification updates,
then I'd be happy to look at the K7 spurious interrupt problem.
Without documentation it's just guesswork, and I don't have time for that.
/Mikael
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