i did some benchmarking on a high-end dual P3 Xeon (Serverworks chipset )
with QLogic 2300 (2gbit/s) 64/66 Fibre Channel controllers.
using the '/dev/sgX' interface to issue scsi reads/writes allowed me to hit
the magical limit of 200mbyte/sec throughput. (basically just about
linerate). (simultaneous "sg_read if=/dev/sgX mmap=1 bs=512 count=35M";
sg_read from the sg-tools package)
doing the same test thru the block-layer was basically capped at around
135mbyte/sec. (simultaneous "dd if=/dev/sdX of=/dev/null bs=512 count=35M").
whether the bottleneck was copy-from-kernel-to-userspace (ie. exhaustion of
Front-Side-Bus / memory bandwidth) or related to block-layer overhead and
scsi layer overheads, i haven't yet validated, but at a ~35% performance
difference is relatively significant nontheless.
cpu utlization on the sg interface was under 10%. using 'dd' on the sd
interface, both gigahertz P3 Xeons had 0% idle time.
cheers,
lincoln.
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