RE: Initial process CPU state was Re: SSE related security hole

Bill Davidsen (davidsen@tmr.com)
Wed, 24 Apr 2002 15:18:14 -0400 (EDT)


On Tue, 23 Apr 2002, Saxena, Sunil wrote:

> The correct sequence for initializing MMX/SSE/SSE2 CPU state (I exchanged
> mail with Linus) is:
>
> memset(&fxsave, 0, sizeof(struct i387_fxsave_struct));
> fxsave.cwd = 0x37f;
> fxsave.mxcsr = 0x1f80;
>
> fxrstor(&fxsave);
>
> The above is architectural feature and you can expect this to work in the
> future. Intel will work to document this in our Monthly Specification
> Updates and update "IA-32 Intel(R) Architecture Software Developer Manual"s.

Sure is nice to see some vendor support!

-- 
bill davidsen <davidsen@tmr.com>
  CTO, TMR Associates, Inc
Doing interesting things with little computers since 1979.

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