James L Peterson wrote:
> What does this mean? This suggests that PCI controller for
> big-endian systems are not interchangeable with PCI controllers
> for little-endian systems, because the controller itself does
> byte swapping (is that what you mean by "byte twisting"?)
I think David's reference is to the system's PCI subsystem/interface rather
than to the PCI cards plugged into it.
No, I'm talking about the "PCI host controller" the thing that
connects the PCI bus to the system bus :-)
And to address James's concern, yes unmodified such a PCI controller
won't work on a little-endian system, but any sane hardware designed
would add at least a jumper of some sort to switch the behavior of
the endianness features.
All of this has to do with what "byte X" within a word means when it
comes from a little endian vs. a big endian processor.
Can I ask you to have a stare at the following document before
continuing this thread further?
http://www.sun.com/processors/manuals/802-7835.pdf
In particular, I wish you would read Chapter 10 "endianness support".
it starts on page 115. Sun's controller does things right, compare it
with yours to see if it deals with the byte lanes correctly when
hooked up to a big endian processor :-)
Note your original problem is an absolutely trite example, if that
code in the kernel doesn't work you are going to have tons of other
problems elsewhere when accessing things on the PCI bus.
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