Hi Gabor,
I assume you are referring to the single-bit-wide EEPROM interface in
bits 24-28 of the PLX-9050 CNTRL register at offset 0x50 in PCI
configuration space.
Your pci_resource_start call is attempting to map BAR0, not PCI
configuration space. You need to use the other series of pci_* calls
that access config space, in particular, the pci_*_config_* series.
<start quote>
4. How to access PCI config space
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
You can use pci_(read|write)_config_(byte|word|dword) to access the
config space of a device represented by struct pci_dev *. All these
functions return 0 when successful or an error code (PCIBIOS_...) which
can be translated to a text string by pcibios_strerror. Most drivers
expect that accesses to valid PCI devices don't fail.
If you access fields in the standard portion of the config header,
please use symbolic names of locations and bits declared in <linux/pci.h>.
<end quote>
Good luck,
Ed Vance
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Ed Vance edv@macrolink.com
Macrolink, Inc. 1500 N. Kellogg Dr Anaheim, CA 92807
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