During idle, the current monitors on our StrongARM-based low power
testbed show a distinct 100Hz beat. A significant portion of idle
power consumption can be attributed to the timer interrupt. IIRC the
IBM LinuxWatch people came to a similar conclusion.
In some cases we definitely do want very low overhead idle systems.
And of course on ARM systems context switches are relatively
expensive anyway, due to the need to flush the (virtually
indexed/tagged) caches.
JDB
[not that I'm proposing to inflict this on the mainline kernel]
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