Ok, I thought of one thing that might make things clearer here: when I
say "the write failed", I mean that we saw the write go out on the PCI bus
and then the box locked up. We were looking at it on a PCI bus analyzer.
That, and it wasn't just this write, or just writes in general, it really
seemed random.
BTW, I don't know what PCI posting effects are...
Kent
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