Unrelated - in fact you have bugs before and after. The fixes in question
were two sets
1. In certain bizarre situations the ppro violates store ordering. It
needs lock based spin_unlock to avoid that. Ditto locks to ensure
stores don't bypass stuff on pci_map interfaces. (This btw is the
same errata as the FENCE stuff in libglide is all about)
2. Certain address ranges must never be cached on the ppro due to an
errata. We broke that in two ways - if there was RAM there, and
if we mapped a card there and set MTRR's to write combine it.
Alan
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