> 1) Is the LVI interrupt supposed to arrive when the chip *starts*
> playing the last buffer?
> 2) Does SiS actually do it this way?
>
> If your theory on why the registers are spinning is correct, and if we
> receive the LVI interrupt with too much latency, your code will still
> deadlock, Doug. (The LVI interrupt handler calls update_ptr first
> thing, which calls get_dma_address.) Furthermore, if this turns out to
> be the case, the LVI IRQ handler uses dmabuf->count to determine
> whether to call stop_dac, and needs to call update_ptr to update
> dmabuf->count... so an explicit stop_dac might be needed elsewhere.
>
> Even if the LVI interrupt comes at the beginning of the buffer, those
> 2048 bytes will play in 10.67 ms. Can we really guarantee that kind of
> latency?
Add to this, if SiS isn't sending DCH, and LVI arrives at the beginning
of the last buffer, count is still > 0, so we don't call stop_dac. And
we're right back where we started.
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