Re: "APIC error on CPUx" - what does this mean?

[Petr Vandrovec]

On  9 Jan 02 at 1:30, Chris Wedgwood wrote:
> On Tue, Jan 08, 2002 at 01:12:04PM +0100, Maciej W. Rozycki wrote:
> 
>     A possible reason is the 8259A in the chipset deasserts its INT
>     output late enough for the Athlon CPU's local APIC to register
>     another ExtINTA interrupt sometimes, possibly under specific
>     circumstances.
> 
> Actully... we could potentially measure this... after an interrupt it
> serviced (or before, or both) we could store the interrupt source
> globally and the cycle counter... when a suprrious interrupt is
> received check the last interrupt and how long ago it was and then
> start looking for a pattern...

I instrumented kernel at home, and when spurious interrupt happens,
stack trace almost always says that spurious interrupt happened
during HLT in default_idle (if I disable ACPI...), ISR is always zero,
and IRR contains 0x00 (before parport driver is loaded) or 0x80
(after parport driver is loaded (without IRQ support)). Few times
stack trace was different, and pointed to ide__sti() in ide_do_request,
but it was < 5% of occurences. 

As spurious IRQ happens during HLT, and IRR is clear at the time
we are going to ack IRQ, it looks like real spurious IRQ (caused by
noise?). Or delay between spurious one and real IRQ is really long. 
I'll try some of your suggestions today night.
                                        Best regards,
                                            Petr Vandrovec
                                            [e-mail]