Re: i686 SMP systems with more then 12 GB ram with 2.4.x kernel ?

[T. A.]

    There are 2MB pages as well.  Probably would be a better choice than
4MB.  Also only has a 2 tier paging mechanism instead of a 3 tier one when
paging with 4KB which should help take care of the current slowdown with
highmem.

----- Original Message -----
From: "Chris Wedgwood" <[e-mail]>
To: "Marvin Justice" <[e-mail]>
Cc: "Alan Cox" <[e-mail]>; "Benjamin LaHaise"
<[e-mail]>; "Gerrit Huizenga" <[e-mail]>; "M. Edward
Borasky" <[e-mail]>; "Harald Holzer" <[e-mail]>;
<[e-mail]>
Sent: Sunday, January 06, 2002 9:38 PM
Subject: Re: i686 SMP systems with more then 12 GB ram with 2.4.x kernel ?

> On Sun, Jan 06, 2002 at 08:18:33PM -0600, Marvin Justice wrote:
>
>     Here's my (probably simple minded) understanding. With the PSE bit
>     turned on in one of the x86 control registers (cr3?), page sizes
>     are 4MB instead of the usual 4KB. One advantage of large pages is
>     that there are fewer page tables and struct page's to store.
>
> Ah, I knew 4MB pages were possible... I was under the impression _all_
> pages had to be 4MB which would seem to suck badly as they would be
> too coarse for many applications (but for certain large sci. apps. I'm
> sure this would be perfect, less TLB thrashing too with sparse
> data-sets).
>
> On the whole, I'm not sure I can see how 4MB pages _everywhere_ in
> user-space would be a win for many people at all...
>
>
>   --cw
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