No. x86_udelay_tsc is initialized by time_init(), and time_init() is called before
smp_init(). The udelay implementation only multiplies with loops_per_jiffy,
therefore there is no oops on i386.
But could oops if the bios disables the TSC instruction - the first printk on
the secondary cpu happens before
clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE)
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