Re: [PATCH] task_struct + kernel stack colouring ...

[Davide Libenzi]

On Wed, 5 Dec 2001, Manfred Spraul wrote:

> Davide Libenzi wrote
>
> >
> >
> >By adding three bits of colouring you're going to cut the collision of
> >about 1/8.
> >
> No, Shuji is right:
> You have just shifted the problem, without reducing collisions.
> 256 kB, 4 way cache with 32 byte linesize.
>
> cacheline == bits 15..5
> offset within cacheline: bits 4..0
>
> The colouring must depend on more than just bits 13 to 15 - if these
> bits are different, then the access goes into a different line even
> without colouring, there won't be a collision.

Yep, damn true, using 13..15 I'll get "vertical" shift that is already
implicit.
In that case we need a more deep knowledge of the cache architecture like
size and associativity.

- Davide