> "Richard B. Johnson" wrote:
> >
> > On Wed, 28 Nov 2001, Chris Meadors wrote:
> >
> > > On Wed, 28 Nov 2001, Martin Eriksson wrote:
>
> ...
> ... rumours deleted (e.g. "printer status bits are all ORed into irq7")
> ...
>
> >From "Harris Semiconductor 82C59A Interrupt Controller Datasheet":
> If no interrupt request is present at step 4 of either sequence
> (i.e., the request was too short in duration), the 82C59A will
> issue an interrupt level 7.
Uhmm... call me slow, but I don't get it 100%... so this message has NOTHING
to do with the LPT IRQ7? It just signals this because IRQ7 is the lowest
priority IRQ on the 8259A?
>
> 1. The irq controller sees an interrupt.
> 2. The irq controller signals "there is _some_ interrupt" to the cpu.
> 3. The CPU acks via INTA
> 4. The irq controller looks if the irq is still there
> (and signals IRQ7 if the line is no longer active).
Umm.. so again.. this means that the IRQ is not held long enough for the PIC
to actually recognize *what* IRQ was asserted?
>
> You have some device which doesn't keep the IRQ raised long enough !
> (or the CPU doesn't service the irq for a too long time and the
> edge triggered irq is de-asserted or even serviced by a polling routine)
Thanks a bunch for clearing this up (this far)!!
When we get a firm indication on the 'problem', could the "spurious 8259A
interrupt" message be de-obfuscated into something less unsettling?
PS. Real Men (tm) never reads the datasheets!
_____________________________________________________
| Martin Eriksson <nitrax@giron.wox.org>
| MSc CSE student, department of Computing Science
| Umeå University, Sweden
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