Yep, but it probably won't do as well on my 2x366 celeron system that I use
every day...
Haven't tested, but it looks like there wouldn't be much chance of the third
CPU hog to stay in the caches. That's pretty much flushing the entire cache
of the previous task with the longer periods of execution.
Now, if the number of sequential jiffies were modified based on the L1/L2
cache sizes that would be interesting...
Also Ingo, if you're worried about your processes staying in the cache, I'd
work on the processor affinity before working on this... But, then again,
I'm not you, and I don't know how myself... :(
Mike
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