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Content-Type: TEXT/PLAIN; charset=US-ASCII
< On Wed, Oct 10, 2001 at 02:47:05PM -0700, Paul McKenney wrote:
< > > I don't think it's actually all that bad. There won't be all
< > > that many places that require the rmbdd, and they'll pretty
< > > much exactly correspond to the places in which you have to put
< > > wmb for all architectures anyway.
< >
< > Just to make sure I understand... This rmbdd() would use IPIs to
< > get all the CPUs' caches synchronized, right?
<
< Err, I see your confusion now.
<
< "Correspond" meaning "for every wmb needed on the writer side,
< there is likely an rmb needed on the reader side in a similar
< place".
Fair enough!
Here are two patches. The wmbdd patch has been modified to use
the lighter-weight SPARC instruction, as suggested by Dave Miller.
The rmbdd patch defines an rmbdd() primitive that is defined to be
rmb() on Alpha and a nop on other architectures. I believe this
rmbdd() primitive is what Richard is looking for.
Please pass on any comments or criticisms. I am particularly
interested in comments from people with PA-RISC and MIPS
expertise, as I am not 100% sure that I have interpreted
the PA-RISC architecture manual correctly, and I do not yet
have a MIPS manual. I do not believe that these architectures
need the Alpha treatment, but then again, I didn't think
that Alpha needed the Alpha treatment when I first encountered
it -- and I am quite clearly not the only one! ;-)
Thanx, Paul
PS. An updated explanation of why this is needed may be found
at http://lse.sourceforge.net/locking/wmbdd.html
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