The ones I have talked to showed no signs of having done so. However,
their architecture -does- make it quite challenging for anyone trying to
write lock-free common code, hence all the IPIs.
> "wmb" == "membar #StoreStore".
> "mb" == "membar #Sync".
>
> See the nice mb/rmb/wmb macros in <asm/system.h>.
OK, if "membar #StoreStore" really is equivalent to "wmb", then
"membar #StoreStore" definitely will -not- do the job required here.
Will "membar #SYNC" allow read-side "membar #ReadRead"s to be omitted,
or does "membar #SYNC" fail to detect when outstanding cache
invalidations complete?
Thanx, Paul
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