Re: Athlon oops traced to CONFIG_MK7 code in arch/i386/lib/mmx.c

[Alan Cox]

> I'm interested if there is an explanation of the MK7 specific code in mmx.c and
> whether that could really be the source of the problem. I would like to get
> to the bottom of this.

As far as we can tell the problem is 'using a VIA chipset'. The code itself
is a fast copying loop using mmx/3dnow/amd athlon extended mmx stuff

Pick up an Athlon documentation set (pdf on the web site) and you should be
able to follow it. prefetch does what you'd expect, sfence is a store fence
for non temporal stores (ie out of order stuff) amd movntq is an out of order
move

> FWIW - the RedHat 7.1 stock 2.4.2 athlon kernel boots successfully without oopsen.

That doesn't have CONFIG_MK7k