I've looked thorough all flush_page_to_ram and flush_icache_page calls.
If the architecture support follows the rule of Documentation/cachetlb.txt,
I think that all the occurrences of flush_page_to_ram and
flush_icache_page are (almost) bogus now.
We have two issues yet:
(1) include/linux/highmem.h:memclear_highpage_flush
We need to call flush_dcache_page here to remove flush_page_to_ram
(2) kernel/ptrace.c
We need to call flush_dcache_page here too.
Special care would be needed here. I think that we cannot defer
the flushing here. There's the case where page->mapping ==
&swapper_space, thus mapping->i_mmap == NULL
&& mapping->i_mmap_shared == NULL.
Besides, flush_cache_page in mm/memory.c:{break_cow,do_wp_page} are
redundant for SH-4. SH-4's cache is direct mapped, virtually indexed
phisically tagged, so we don't need to flush anything.
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