David> Jes Sorensen <jes@sunsite.dk> wrote:
>> Have you considered the method used by the 8390 Ethernet driver?
>> For each device, add a pointer to the registers and a register
>> shift.
David> And also flags to specify which address space the I/O ports
David> reside in, and which how to adjust the host-PCI bridge to bring
David> the appropriate bit of the PCI address space into view through
David> the CPU address space window. Don't laugh - it happens.
Hmm, I am shocked ;-)
>> I really don't like hacing virtual access functions that makes
>> memory mapped I/O look the same as I/O operations.
David> Why not? It makes drivers a simpler and more flexible if they
David> can treat different types of resource in the same way. serial.c
David> is a really good example of this:
It will also degrade performance if you introduce all these weird
tests or function calls in the hot path.
David> The switch has to be performed at runtime - so you get at least
David> one conditional branch in your code, probably more. My proposal
David> would replace the conditional branch with a subroutine (which
David> lacks the pipline stall).
Actually on some architectures you'd prefer the conditional branch
over the subroutine call when you can do predication like on the ia64.
David> Also a number of drivers (eg: ne2k-pci) have to be bound to
David> compile time to either I/O space or memory space. This would
David> allow you to do it at runtime without incurring conditional
David> branching.
But it's going to cost for the ones who do not support this.
>> For memory mapped I/O you want to be able to smart optimizations to
>> reduce the access on the PCI bus (or similar).
David> I wouldn't have thought you'd want to reduce the number of
David> accesses to the PCI bus. If, for example, you did to writes to
David> a memory-mapped I/O register, you don't want the first to be
David> optimised away.
One good example I can think off is when you update a dma descriptor
in PCI shared memory space (__raw_writel()). In that case you want to
be able to use posted writes so all writes is done in one PCI write
transaction instead of individual ones.
Jes
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