Re: [OT] Threads, inelegance, and Java

[Pete Zaitcev]

> This [code morphing and binary tranlation]
>  was set off to provide compensation for the biggest hurdle
> of VLIW design - insane code size and partially huge memmory
> bus bandwidth designs due to this. (Why do you think the itanim
> sucks on integer performance?)

First, Merced does not suck on integer performance.
It does about 300 SPEC CPU2000 at 733MHz, give or take,
subject to compiler improvements.
That blows all RISCs out of the water (except Alpha, yet.
The best result they submitted is 511 base 533 peak
at 833MHz).

> [...] Well but in relity underclocked modern
> design optimized for power consumtions beat the transmeta
> chip easly: Geode, and the recently announced VIA chip to name a few.

Man, where do you get this falsehood. TM-5400 is way, way
faster than Geode (several times for any benchmark).
This is exactly the reason why Transmetians love to
showcase DVD playing and other performance related
stuff - it is where they beat Geode. Geode's performance
is quite adequate for kiosk/POS app and it's a formiddable
competitor for anything that needs no performance.

> In comparision to chip design esp. targetted at low power consumtion
> the transmeta chip is laughable: this ARM please! My psion
> beats *ANY* chip from them by huge magnitude.

"Beats" by what metric? Sucks harder?

-- Pete