i have a very simple question.
please CC any reply to me, since im not subscribed to the list
On the same processor i have the following code (initially a = 0)
1. write a = 1
2. read b
if an interrupt occurred after line 1 and before line 2, and that ISR
reads the value of a, is there a chance it can see the value of a as 0?
Hope the question isnt too stupid, but the processor can buffer stores to
memory ? (Does it supply the correct value of a to the isr if it does). if
not, mb wont solve the problem i suppose? its meant for other cpus ?
Thanks,
Praveen C
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/