> the attached pae-2.4.3-C3 patch fixes the PAE code to work with SLAB
> FORCED_DEBUG (which enables redzoning) too.
>
> the problem is that redzoning is enabled unconditionally, and SLAB has no
> information about how crutial alignment is in the case of any particular
> SLAB cache. The CPU generates a general protection fault if in PAE mode a
> non-16-byte aligned pgd is loaded into %cr3.
How about just fixing the debug code to align things? Sure it wastes
a bit of memory, but debug code is like that.
Sane alignment might be: largest power-of-two factor of the size,
or 4 bytes, which ever is larger. (adjust "4" per-arch as needed)
For an SMP config, set a minimum alignment equal to the cache line size.
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