Re: Serial port latency

[Theodore Tso]

On Thu, Mar 22, 2001 at 09:32:39PM +0100, Geir Thomassen wrote:
> 
> The serial port chip is 16550A, which has a built in fifo. Can this be
> the source of my problems ?

Well, if you set the uart to be 16450 using setserial, this will cause
Linux to avoid enabling the FIFO.  That will cause the loop to save
the 4 character times (which at 9600 bps is 4ms).  If your original
protocol is writing six characters, and then reads 2 characters in a
tight loop, that means a total cycle takes 8ms, and disabling the FIFO
will have significant savings assuming that all other causes of
latencies have been removed.  (The FIFO delay can cause a slowdown by
50%).

						- Ted